DAC library for MCP4706, MCP4716, MCP4726 and AVR microcontrollers

This library is intended for the MCP47x6 series of DAC devices that includes MCP4706 (8-bit DAC), MCP4716 (10-bit DAC) and MCP4726 (12-bit DAC) and it uses the I2C library that can be downloaded from down below. If you want to know more about it visit I2C and TWI library for AVR.

MCP47x6 DAC pinout

1 - VOUT: this is the DAC analog output voltage. In Normal mode, the DC impedance of the output pin is about 1Ω. In Power-Down mode, the output pin is internally connected to a known pull-down resistor of 1 kΩ, 125 kΩ, or 640 kΩ. The VOUT pin can drive up to 100 pF of capacitive load in parallel with a 5 kΩ resistive load. It is recommended to use a load with RL greater than 5 kΩ. Driving large capacitive loads can cause stability problems for voltage feedback op amps.

I2C and TWI (Two Wire Interface) library for AVR microcontrollers

In the last article I talked about How I2C and TWI protocol works and we saw that they are mostly the same so this library works for both I2C and TWI serial interfaces. You don't have to know every detail about how the I2C protocol works but I strongly recommend reading the article to have a general idea about it, and that way it will be easier to use this library.

Using the I2C, TWI library with an AVR microcontroller

Setting the library file

As always, first include the library file:

#include "twi.h"

Most AVR microcontrollers have two TWI modules TWI0 and TWI1 so to choose between the two there is the following line of code:

#define TWI_MODULE_NUMBER	0 // TWI module 0 or 1

The default module is TWI0.

Functions

void TWI_Init(uint32_t frequency)

Used to initialize the TWI module. This will set the TWI bit rate and enable global  interrupts. 400kHz is the maximum TWI speed that regular AVR microcontrollers supports although I have managed to talk to a DAC at 577kHz.

frequency:  can be one of the following constants or any value between 100-400kHz.

#define TWI_400KHZ	400000 // Hz
#define TWI_100KHZ	100000 // Hz

How the I2C and TWI (Two Wire Interface) protocol works

I²C is a two-wire serial bus communication protocol invented by Phillips in 1982. TWI stands for Two Wire Interface and, for the most part, this bus is identical to I²C. The name TWI was introduced by Atmel and other companies to avoid conflicts with trademark issues related to I²C. Because these two protocols are almost the same I will refer to them interchangeably throughout the course of this article.

This protocol is very used nowadays by all sorts of devices such as DACs, LCDs, sensors, etc. so it's worth learning about it.

As a disclaimer I need to mention that most parts of this article contains fragments from the ATmega328, 324 datasheet and MCP4706 datasheet. I liked how they explained the I2C, TWI protocol  and since not many people read the datasheets I want to share this information with anyone interested in the TWI protocol.

If you're interested in a I2C, TWI library it can be found at this link I2C, TWI library.

Features

• 7-bit Address Space Allows up to 128 Different Slave Addresses
• Multi-master Arbitration Support
• General call addressing

The I2C interface specifies different communication bit rates. These are referred to as Standard, Fast or HighSpeed modes.

• Standard mode: bit rates up to 100 kbit/s
• Fast mode: bit rates up to 400 kbit/s
• High-Speed mode (HS mode): bit rates up to 3.4 Mbit/s

High-Speed mode is currently unsupported by the TWI.

Table of Contents

• Two-Wire Serial Interface Bus
• TWI Terminology
• Data Transfer and Frame Format
• START and STOP Conditions
• Address Packet Format
• Data Packet Format
• Combining Address and Data Packets into a Transmission
• Multi-master Bus Systems, Arbitration, and Synchronization
• SCL Synchronization Between Multiple Masters
• Arbitration Between Two Masters
• Practical I2C example 1: Writing data to MCP4706 DAC device
• Practical I2C example 2: Reading data from MCP4706 DAC device
  

 

Two-Wire Serial Interface Bus

The TWI protocol is able to interconnect up to 128 different devices using only two bidirectional bus lines: one for clock (SCL) and one for data (SDA). The only external hardware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and mechanisms for resolving bus contention are inherent in the TWI protocol.

TWI Bus Interconnection

The number of devices that can be connected to the bus is only limited by the bus capacitance limit of 400pF and the 7-bit slave address space. The SCL and SDA pins are open-drain configurations. For this reason these pins require a pull-up resistor.