I2C is a two-wire serial bus communication protocol invented by Phillips in 1982. TWI stands for Two Wire Interface and, for the most part, this bus is identical to I²C. The name TWI was introduced by Atmel and other companies to avoid conflicts with trademark issues related to I²C. Because these two protocols are almost the same I will refer to them interchangeably throughout the course of this article.
This protocol is very used nowadays by all sorts of devices such as DACs, LCDs, sensors, etc. so it's worth learning about it.
As a disclaimer I need to mention that most parts of this article contains fragments from the ATmega328, 324 datasheet and MCP4706 datasheet. I liked how they explained the I2C, TWI protocol and since not many people read the datasheets I want to share this information with anyone interested in the TWI protocol.
If you're interested in a I2C, TWI library it can be found at this link I2C, TWI library.
Features
- 7-bit Address Space Allows up to 128 Different Slave Addresses
- Multi-master Arbitration Support
- General call addressing
The I2C interface specifies different communication bit rates. These are referred to as Standard, Fast or HighSpeed modes.
- Standard mode: bit rates up to 100 kbit/s
- Fast mode: bit rates up to 400 kbit/s
- High-Speed mode (HS mode): bit rates up to 3.4 Mbit/s
High-Speed mode is currently unsupported by the TWI.
Table of Contents
- Two-Wire Serial Interface Bus
- TWI Terminology
- Data Transfer and Frame Format
- START and STOP Conditions
- Address Packet Format
- Data Packet Format
- Combining Address and Data Packets into a Transmission
- Multi-master Bus Systems, Arbitration, and Synchronization
- Practical I2C example 1: Writing data to MCP4706 DAC device
- Practical I2C example 2: Reading data from MCP4706 DAC device
Two-Wire Serial Interface Bus
The TWI protocol is able to interconnect up to 128 different devices using only two bidirectional bus lines: one for clock (SCL) and one for data (SDA). The only external hardware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and mechanisms for resolving bus contention are inherent in the TWI protocol.
TWI Bus Interconnection
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The number of devices that can be connected to the bus is only limited by the bus capacitance limit of 400pF and the 7-bit slave address space. The SCL and SDA pins are open-drain configurations. For this reason these pins require a pull-up resistor.